1. Field of the Invention
The invention relates to the field of BiCMOS processing and, in particular, the formation of a collector region for a bipolar transistor formed as part of a BiCMOS process.
2. Prior Art
Some unique problems arise in the fabrication of bipolar transistors as part of metal-oxide-semiconductor (MOS) processing. One of these problems associated with the collector region of bipolar transistors is addressed in this application.
In the prior art, it is common to use a relatively low doped substrate region (e.g., 1E16-4E16) for the collector region and then to form the base region in the collector region and finally, to form the emitter region in the base region. If a highly doped collector region is used, the collector-base depletion region is narrow with a high electric field. This results in high speed electrons in an npn transistor that causes impact ionization. Holes generated by impact ionization due to this electric field cause a negative base current and a seemingly high gain. The corresponding problem occurs for pnp transistors.
In BiCMOS processing, it is common to use a heavily doped buried region to separate the bulk substrate from the more lightly doped collector region. Typically the collector region is formed in an epitaxial layer grown over the highly doped buried region.
As will be seen with the present invention, bipolar transistors are formed in a relatively highly doped well (1E17) which wells are also used as host regions for field-effect transistors. This eliminates the special processing needed to fabricate collector regions independently of the host regions for the field-effect transistors. The resultant collector region has relatively low resistance with reduced base to collector capacitance.
The following prior art is known to Applicant: U.S. Pat. Nos. 4,484,388; 4,602,269; 4,927,776; 4,933,295; 4,957,874; and 4,965,216.